ARM Cortex-A 系列處理器一般分為低、中和高性能三個(gè)性能層級(jí)。高階處理器可實(shí)現(xiàn)最佳化性能，而低階處理器則在一定的性能級(jí)強(qiáng)調(diào)最佳化功效，但均支持“big.LITTLE”架構(gòu)以及異質(zhì)多核心處理。 以32位處理器架構(gòu)來(lái)看，ARM 分別提供了 A7 、 A12 與 A15 處理器，而64位架構(gòu)則有 Cortex-A57 ，高功效處理器則是 Cortex-A53 。 這是否意味著市場(chǎng)可預(yù)期ARM將推出一系列 Cortex-A5X 系列中階組件？根據(jù)我最近遇到的ARM主管表示該公司將持績(jī)積極部署，但ARM將開(kāi)始建置big-medium-little處理器核心策略嗎？或許短期來(lái)看并非如此。 但從ARM工程師最近的產(chǎn)品現(xiàn)場(chǎng)展示來(lái)看，根據(jù)工作負(fù)載與建置的不同， Cortex-A7 與 A15 所表現(xiàn)出來(lái)的相對(duì)性能差異約在2-3倍之間。從下圖來(lái)看，如果 Cortex-A7 的確僅占約1/4或1/5的芯片面積，僅消耗約1/4或1/5的功耗，那么事情將會(huì)變得十分有趣。

隨著時(shí)間的推移，制程技術(shù)與架構(gòu)的進(jìn)展，處理器核心性能持續(xù)提升。
Source：ARMIs0esmc

值得注意的是，采用面積與功耗更高5倍的 Cortex-A15 ，相當(dāng)于 Cortex-A7約2-3倍的性能。那么，為什么不用四顆 Cortex-A7 核心來(lái)取代 Cortex-A15 呢？不就能夠在相同的功耗與芯片面積上實(shí)現(xiàn)更多原始性能嗎？ 當(dāng)然，其原因在于只考慮到了單一執(zhí)行緒，但不能忽略多核心 SoC 架構(gòu)的影響。 當(dāng)我與ARM應(yīng)用處理器產(chǎn)品銷(xiāo)售副總裁Nandan Nayampally討論這一點(diǎn)觀察時(shí)，他說(shuō)：“沒(méi)錯(cuò)，針對(duì)多執(zhí)行緒應(yīng)用，4顆A7可實(shí)現(xiàn)較單一A15更高性能，但在移動(dòng)應(yīng)用中，單一執(zhí)行緒的峰值性能更為重要?！币徽Z(yǔ)道出了重點(diǎn)。 但Nandan Nayampally也坦承，精簡(jiǎn)型“LITTLE”核心在未來(lái)的SoC扮演至關(guān)重要的角色。他承認(rèn)有些SoC可能相當(dāng)依賴(lài)于“LITTLE”核心，“因 此，你將會(huì)看到連網(wǎng)SoC可能采用 A15 或 A57 以及許多的 A7 或 A53 。接著這將進(jìn)一步轉(zhuǎn)變成采用 A7 / A12 / A15 以及其它資源，再經(jīng)由操作系統(tǒng)進(jìn)行分配?！? 本文授權(quán)編譯自EE Times，版權(quán)所有，謝絕轉(zhuǎn)載 編譯：Susan Hong 參考英文原文：How ARM's Cortex-A7 Beats the A15，by Peter Clarke, European News Director

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{pagination} How ARM's Cortex-A7 Beats the A15 Peter Clarke, European News Director ARM's Cortex-A series of processors has now divided into three tiers associated with low, medium, and high performance. The high tier is optimized for performance, and the low tier is optimized for stripped-down power efficiency at lower absolute performance levels, all in support of the big-little and heterogeneous multicore processing. At the 32-bit level these three tiers feature the A7, the A12, and A15, and the 64-bit level is represented by the Cortex-A57. The high efficiency processor is the Cortex-A53. Does that mean the market should expect a series of mid-range parts in the Cortex-A5X series and going forward? Yes although ARM executives that I recently met with were also keen to keep their marketing powder dry. Does it mean that ARM is going to start implementing a big-medium-little processor core strategy? In the short term probably not, but I would like to assign that discussion for another day. But what ARM engineers did show me at a recent analysts' conference is that relative performance of the Cortex-A7 and A15 differs by a factor of two or three depending on workload and implementation. Now, when you add that to the fact that the Cortex-A7 occupies about one quarter or one fifth of the die area and consumes one quarter to one fifth of the power, things become interesting (see chart below). Three tiers of processor cores with performance going up and to the right over time. (Source: ARM) To reiterate: With a Cortex-A15, at five times the area and five times the power consumption, you can get two or three times the performance of the Cortex-A7. So why wouldn't you replace any Cortex-A15 cores with four Cortex-A7s? You would get more raw performance at about the same power consumption and in the same die area. The reason, of course, depends on considering single-thread performance, but still it makes you think about the implications for multicore SoC architectures. When I put my observation to Nandan Nayampally, vice president of product marketing for application processors at ARM, he said: "Yes four A7s is more performance than one A15 for multi-threaded applications, but in mobile, single-threaded peak performance is also important." Point made. But Nayampally conceded that the stripped-down "little" cores do have a vital role to play in future SoCs. He admitted that some SoCs may depend substantially on little cores. "So you will see things like networking SoCs with a couple of A15s or A57s and a lot of A7s or A53s. This then moves to generalize further to A7/A12/A15 and other resources, and an operating system governor will make allocations."