東芝公司(Toshiba)宣布將在今年八月激活位于日本三重縣四日市的 Fab 5 新廠第二期工程，準(zhǔn)備增加 NAND 閃存的制造產(chǎn)能，同時轉(zhuǎn)移至 3D NAND 生產(chǎn)。 這項工程預(yù)計將在2014年夏天完成，東芝強調(diào)，目前尚未決定任何設(shè)備投資等細(xì)節(jié)，但未來將視市場動向而定。這表示東芝為該新廠的資本支出規(guī)模與速度，將取決于市況而調(diào)整。 在 2012年7月，東芝曾經(jīng)因考慮到市場供過于求以及芯片降價壓力，因而削減30%的 NAND 閃存產(chǎn)量。然而，在不到六個星期的時間，NAND閃存的一些客戶們就開始抱怨內(nèi)存芯片不足，而多年來持續(xù)降價的NAND芯片在2013年開始止跌回升。此外，日圓走軟也讓東芝較三星和SK海力士等競爭對手取得更佳優(yōu)勢。 Fab5廠的第二期工程將更強調(diào)減少對于環(huán)境的影響。相較于同樣位于四日市的Fab 4廠，F(xiàn)ab5廠采用余熱回收等基于 LED照明和節(jié)能的生產(chǎn)方式，可望降低13%的二氧化碳排放量。 Fab 5廠第2期工程預(yù)計在裝機后，可望執(zhí)行東芝多層 BICS (位成本可擴展的) 3D NAND 內(nèi)存制造制程。雖然這種技術(shù)目前尚未量產(chǎn)，但東芝將能主導(dǎo) 3D NAND 制造地位。2012年底，該公司曾宣布開發(fā)出基于50nm垂直信道的16層原型設(shè)備，今年已可提供樣片，并預(yù)計在2015年量產(chǎn)。 本文授權(quán)編譯自EE Times，版權(quán)所有，謝絕轉(zhuǎn)載 編譯：Susan Hong 參考英文原文：Toshiba to Build Fab for 3D NAND Flash，by Peter Clarke

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{pagination} Toshiba to Build Fab for 3D NAND Flash Peter Clarke LONDON — Toshiba is preparing to increase NAND flash manufacturing capacity and move to vertically organized 3D NAND with the start of construction in August of the second phase of Fab 5 at its Yokkaichi facility in Mie, Japan. The building work will be completed in summer of 2014, Toshiba said in a statement, noting that decisions on equipment investment have not yet been taken but "will reflect market trends." This is a way of saying that Toshiba will vary the amount and speed of its capital expenditure at the site depending on market conditions. A year ago, in July 2012, Toshiba cut NAND flash production by 30 percent because it had concerns about market oversupply and downward pressure on chip prices. However, within six weeks some customers for NAND flash were complaining that they could not get enough of the memory chips. (See: NAND flash memory in short supply.) Prices for NAND chips, which had been in decline for many years, have picked up in 2013. A weaker yen also gives Toshiba an advantage over rivals such as Samsung and SK Hynix in South Korea. The second phase of Fab 5 will be built with an emphasis on minimizing the impact on the environment. LED-based lighting and energy-saving production methods with waste heat recovery are expected to reduce carbon dioxide emissions by 13 percent compared with Fab 4 on the same Yokkaichi site. When kitted out with equipment, Fab 5 Phase 2 will be capable of running Toshiba's multilayered BiCS (Bit-Cost Scalable) manufacturing process for 3D NAND memories. Although this kind of technology is not yet in production, Toshiba is leading the charge towards 3D NAND. In late 2012 the company announced that it had 16-layer prototype devices based on a 50 nm diameter vertical channel. Samples are due this year with volume production in 2015.