專門針對(duì)智能手機(jī)與平板設(shè)備應(yīng)用的移動(dòng)版 PCI Express (PCIe)互連接口規(guī)格已經(jīng)出爐，在日前于美國(guó)舉行的一場(chǎng) PCI 工作小組(Special Interest Group，SIG)年度會(huì)議上，EDA供貨商Cadence與Synopsys都展示了該種 M-PCIe 規(guī)格的工作芯片。
新規(guī)格將PCIe通信協(xié)議搭載于產(chǎn)業(yè)組織 MIPI 所定義的、已經(jīng)廣泛應(yīng)用于移動(dòng)設(shè)備的M-PHY之上，可協(xié)助設(shè)備制造商藉由重復(fù)利用PCIe軟件來降低成本、縮短開發(fā)時(shí)間，并可取代目前市面上各種各樣的行動(dòng)裝置互連協(xié)議。
M-PCIe 是本年度 PCI SIG 年會(huì)上的主角，預(yù)期未來會(huì)在應(yīng)用處理器、Wi-Fi 組合組件、橋接芯片與儲(chǔ)存控制器等芯片上出現(xiàn)；來自Cadnece的一位產(chǎn)品經(jīng)理表示，首款采用該規(guī)格的系統(tǒng)單芯片可望在明年初問世。
Cadence展示采用第二代數(shù)據(jù)傳輸速率、在2.9GHz頻率運(yùn)作的M-PCIe 芯片
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Synopsys展示采用第三代數(shù)據(jù)傳輸速率、在5.8GHz頻率運(yùn)作的M-PCIe 芯片
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本文下一頁：M-PCIe規(guī)格書只有60頁
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• Altera推出業(yè)界首款符合5Gbps PCIe Gen2要求的低功耗FPGA
• 移動(dòng)設(shè)備、嵌入式應(yīng)用前景看好，帶動(dòng)接口IC需求
• 高速通信接口升級(jí)引發(fā)測(cè)試新需求LHUesmc
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M-PCIe規(guī)格書只有60頁，與其它PCI SIG旗下的標(biāo)準(zhǔn)規(guī)格相較簡(jiǎn)潔了許多，這是因?yàn)樵撘?guī)格大部分是參考現(xiàn)有的MIPI M-PHY與第三代PCI協(xié)議規(guī)格；M-PCIe旨在做為應(yīng)用處理器與基頻芯片、Wi-Fi組合芯片、儲(chǔ)存芯片等的連接接口。
M-PCIe規(guī)格大部分是參考現(xiàn)有的MIPI M-PHY與第三代PCI協(xié)議
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本文下一頁：纜線版PCIe頻寬比Thunderbolt更大，成本更低
相關(guān)閱讀：
• Altera推出業(yè)界首款符合5Gbps PCIe Gen2要求的低功耗FPGA
• 移動(dòng)設(shè)備、嵌入式應(yīng)用前景看好，帶動(dòng)接口IC需求
• 高速通信接口升級(jí)引發(fā)測(cè)試新需求LHUesmc
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此外， PCI SIG 也預(yù)期在2014年6月以前完成32Gbps速率的纜線(cable)版本PCIe規(guī)格──OcuLink；PCI SIG行銷小組主席Ramin Neshanti表示，該版本規(guī)格的頻寬比蘋果(Apple)與英特爾(Intel)所支持的競(jìng)爭(zhēng)互連技術(shù)Thunderbolt更大，而且成本更低。
PCI SIG 還發(fā)表了第四代 PCIe 規(guī)格的進(jìn)展，此版本預(yù)期會(huì)是該種銅線PCB互連規(guī)格的最后一次更動(dòng)，將支持每秒16 GTransfers傳輸速率，預(yù)計(jì)2015年初完成。該工作小組在年會(huì)中也介紹了8GT/s速率的第三代PCIe規(guī)格功能提升詳情，以及針對(duì)行動(dòng)裝置應(yīng) 用、旨在取代mini-PCIe卡的硬件新規(guī)格M. 2。
M. 2包含十幾種可取代Wi-Fi組合芯片、固態(tài)硬盤與其它外圍裝置應(yīng)用的Mini PCIe與Half Mini PCIe卡的硬件規(guī)格；該規(guī)格的0.7版預(yù)計(jì)在今年底完成。
將取代Mini PCIe卡的M. 2規(guī)格
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Oculink規(guī)格將未來將支持第四代PCIe與主動(dòng)光纖電纜，向Thunderbolt 挑戰(zhàn)
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本文下一頁：第四代PCIe速率16 GT/s，2015年完成
相關(guān)閱讀：
• Altera推出業(yè)界首款符合5Gbps PCIe Gen2要求的低功耗FPGA
• 移動(dòng)設(shè)備、嵌入式應(yīng)用前景看好，帶動(dòng)接口IC需求
• 高速通信接口升級(jí)引發(fā)測(cè)試新需求LHUesmc
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16 GT/s速率的第四代PCIe預(yù)計(jì)在2015年第一季完成，目前的進(jìn)展為0.3版本；未來將主要應(yīng)用于服務(wù)器，支持40/100G以太網(wǎng)絡(luò)、 Infiniband等。在此同時(shí)，PCI SIG也發(fā)表了3.1版第三代PCIe的功能強(qiáng)化，包括已經(jīng)應(yīng)用于英特爾Haswell處理器的L1功耗模式、更佳的媒介同步與虛擬化改善。
16 GT/s速率的第四代PCIe
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PLDA 以采用Altera與Xilinx的FPGA迷你開發(fā)板展示第二代PCIe
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Teledyne LeCroy 展示低價(jià)位(5,000美元有找)的第二代PCIe協(xié)議分析儀
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本文授權(quán)編譯自EE Times，版權(quán)所有，謝絕轉(zhuǎn)載
編譯：Judith Cheng
參考英文原文：Slideshow: PCIe takes on mobile, Thunderbolt, more，by Rick Merritt
相關(guān)閱讀：
• Altera推出業(yè)界首款符合5Gbps PCIe Gen2要求的低功耗FPGA
• 移動(dòng)設(shè)備、嵌入式應(yīng)用前景看好，帶動(dòng)接口IC需求
• 高速通信接口升級(jí)引發(fā)測(cè)試新需求LHUesmc
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Slideshow: PCIe takes on mobile, Thunderbolt, more
Rick Merritt
PCI Express Gen 3 will ride the MIPI M-PHY in tablets and smartphones thanks to one of several new specs from the PCI SIG. SANTA CLARA, Calif. – The spec is done for a mobile interconnect that will pack PCI Express into smartphones and tablets. Cadence and Synopsys showed working silicon for the M-PCIe interface at the annual meeting of the PCI Special Interest Group here.
The spec lets PCIe protocols ride the M-PHY defined by the MIPI trade group and already widely used in mobile devices. OEMs will adopt the interface to lower costs and shrink development times by reusing PCIe software to replace a wide variety of mobile interconnect protocols.
Separately, the PCI SIG expects to finish work before June 2014 on OcuLink, a 32 Gbit/second cabled version of PCIe. It aims to deliver more bandwidth than the rival Thunderbolt interconnect backed by Apple and Intel at “orders of magnitude lower cost,” said Ramin Neshanti, marketing workgroup chair of the PCI SIG.
In addition, the group announced progress on its Gen 4.0 spec, expected to be the last turn of the crank for copper in pcb interconnects. It will support 16 GTransfers/second and be complete in early 2016.
The SIG also detailed a handful of enhancements to the 8GT/s Gen 3 spec and a new form factor for mobile devices called M.2 that aims to replace mini-PCIe cards.
The M-PCIe news took center stage at the event. It is expected to appear in apps processors, Wi-Fi combo devices, bridge chips and storage controllers. First SoCs using it could tape out early next year, said a Cadence product manager.
Cadence showed M-PCIe running at Gear 2 data rates up to 2.9 GHz.
M-PCIe hits 5.8 GHz
Synopsys showed M-PCIe running at Gear 3 data rates up to 5.8 GHz. A Gear 4 data rate matching the 8 GT/s of PCIe Gen 3 is in the works at MIPI.
A spec written in shorthand
The M-PCIe spec is only 60 pages long, terse by comparison to other PCI SIG standards. That’s because it largely references existing MIPI M-PHY and PCI-SIG Gen 3 protocol specs. It aims to link apps processors with basebands, W-Fi combo chips, storage and more (below).
Click on image to enlarge.
A smaller Mini Card
Click on image to enlarge.
The M.2 spec defines as many as a dozen form factors that can replace existing Mini and Half Mini PCIe cards for Wi-Fi combo chips, solid-state drives and other peripherals. The version 0.7 spec could be complete by the end of the year.
PCIe attacks Thunderbolt
Click on image to enlarge.
Oculink is a cabled PCIe Gen 3 that will deliver up to 32 Gbits/s (using a x4 configuration) over 1-3 meters of a low-cost twisted pair cable with the spec due for complete before June 2014.
Oculink will support PCIe Gen 4 and active optical cables in the future. It aims to outgun and undercut Thunderbolt, launched in early 2011 at 20 Gbits/s.
Speed doubler in the pipeline
Click on image to enlarge.
The 16 GT/s PCIe 4.0 should be complete in Q1 2015, is in a version 0.3 today and should “not require heavy equalization,” said a Neshanti. It will see use mainly in servers for 40/100 Gbit Ethernet, Infiniband and more.
Meanwhile, the PCI SIG is rolling up a number of Gen 3 enhancements into a 3.1 version. They include an L1 power state already used in Intel’s Haswell processor, better media synchronization and refinements for virtualization.
Tiny board packs punch
PLDA showed at the event its tiny Altera and Xilinx FPGA boards supporting PCI3 Gen 2.
Low cost PCIe tester
Teledyne LeCroy shows a PCIe Gen 2 protocol analyzer that sells for less than $5,000.
責(zé)編：Quentin
